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Senior Verification Engineer 420 views

A leading global semiconductor company is recruiting a Senior Verification Engineer (IC) in Ho Chi Minh, Vietnam with the following conditions:
Responsibilities:
  • Perform design verification, building testbench and testcases using UVM methodology.
  • Create/review verification test plan.
  • Create/review functional/code coverage.
  • Support Silicon validation and IC production if needed.
  • Perform design documentation.
  • Study and keep up knowledge of industrial spec, e.g. RISC CPU, USB, I2C, SPI, Ethernet, UART, SD Card, etc.
Requirements:
  • Degree/ Master in Electrical/Electronic Engineering.
  • 3 -7 years experience in the area of digital IC Verification (IP Verification and SOC Verification).
  • Working experience from design to silicon are essential.
  • Experience in Verilog, SystemVerilog, C Language.
  • Experience in SystemVerilog, OVM/UVM verification methodology.
  • Experience in using EDA tools from Cadence, Synopsys.
  • Knowledge and working experience in one or more of the following:
  • Microprocessor system, architecture and development.
  • Digital and mixed-signal design.
  • USB interface products.
  • Ethernet interface products.
  • Graphics processing, graphics system or multi-media streaming development.
  • Knowledge of green power technology including solar cells, generators, inverters, charging circuits, batteries, power management unit and other system components is a plus.
  • Knowledge in connectivity technology such as RISC CPU, USB, I2C, SPI, Ethernet, UART, SD Card, etc.
  • Good English Skills in reading, writing and Speaking.
  • This job has expired!