About Us
Nanochap is a young fabless semiconductor company headquartered in Hangzhou with the core R&D team in Melbourne, Australia. We specialise in neural interface and biosensing SoCs. The company is committed to the R&D, design, packaging, testing, and commercialisation of ultra-high density neural interface chips, biosensing chips, and other medical device related chips. Nanochap is expanding and we are looking for talents in but not limited to Analog Design, Analog Layout, RTL Design, Physical Design to join our newly opened office in Ho Chi Minh city.
Job Responsibilities
- RTL coding using Verilog or SystemVerilog
- Perform functional verification of design on block and system level.
- Perform logic synthesis at sub-system or top level for multi-million gate ASIC projects
- Perform RTL Lint, CDC, LEC and design ECO
- Perform STA signoff, timing ECO
- Work with logic design and PnR engineers on logic, timing, power and physical issues.
- Manage schedules and support cross-functional engineering effort.
- Implement, enhance and maintain Synthesis, STA scripts and various automation flows.
- Contribute to the continuous development of IC design flow.
Required Skills and Experience
- Experience in high speed/high resolution ADC architecture and design, with proven chip tape-outs.
- Experience in low noise, low power, high performance neural recording circuits and bio-signal sensing circuits.
- Full understanding of digital design methodologies and tools including RTL coding in Verilog, simulation, synthesis, DFT Check, STA Check
- Thorough knowledge of the ASIC design timing closure flow and methodology.
- Familiar to Cadence/Synopsys/Mentor tools
- Must have experienced multiple ASIC tape-outs from concept to full production.
- Must have excellent English written and verbal communication and interpersonal skills.
Desirable:
- Familiarity with ARM/RISC-V SoC CPU architectures and peripheral interconnects
- Familiarity with different IP implementations such as ROM, RAM, FLASH, I2C, SPI, UART or other IPs.
- Scoping of design validation and verification requirements
- General knowledge of CPU operations and Software toolchains
- Desirable to have experience in signal processing for RF transceivers (NFC, Bluetooth), and high-speed ADCs.
